简体中文 繁體中文 English
設為首頁 加入收藏 E-mail
首 页 公司簡介 公司新聞 産品介紹 線上訂購 企業文化 工作機會 客戶反饋 聯絡我們
  SE9174C  2A Sink/Source Bus Termination Regulator 詢問此産品

The SE9174C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be pro-grammed by externally forcing the REFEN pin voltage.

 

The SE9174C also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection.

The SE9174C are available in the PSOP-8 (Exposed Pad) surface mount packages.